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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * VCC = 2.5V 0.2V * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * Available in SSOP, TSSOP, and TVSOP packages
IDT74ALVC16646
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
* High Output Drivers: 24mA * Suitable for heavy loads
APPLICATIONS:
* 3.3V high speed systems * 3.3V and lower voltage computing systems
This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16646 can be used as two 8-bit transceivers or one 16bit transceiver. Data on the A or B bus is clocked into the registers on the lowto-high transition of the appropriate clock (CLKAB or CLKBA) input. Output-enable (OE) and direction control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the highimpedance port may be stored in either register or both. The select control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. The ALVC16646 has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
FUNCTIONAL BLOCK DIAGRAM
56 1O E 2O E
29
1D IR 1CL KBA
1
2D IR 2C LKBA
28
55
30
1S BA 1C LKAB
54 2
2S BA 2C LKAB
31 27
1S AB
3
2S AB
26
One of Eight Channels
1D
One of Eight Channels
1D
C1
C1
5 1A 1 1D
52
15 1B 1 2A 1 1D
42
2B 1
C1
C1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
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(c) 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4914/2
IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1DIR 1CLKAB
1SAB
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max VTERM(2) Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Continuous Current through each VCC or GND -0.5 to +4.6 -0.5 to VCC+0.5 -65 to +150 -50 to +50 50 -50 100
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE 1CLKBA
1SBA
Unit V V C mA mA mA mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
VTERM(3) TSTG IOUT IIK IOK ICC ISS
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT COUT Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 5 7 7 Max. 7 9 9 Unit pF pF pF
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
NOTE: 1. As applicable to the device type.
VCC
2A7 2A8
VCC
2B7 2B8
GND
2SAB 2CLKAB 2DIR
GND
2SBA 2CLKBA 2OE
PIN DESCRIPTION
Pin Names xAx xBx Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs Direction-Control Inputs
SSOP/ TSSOP/ TVSOP TOP VIEW
xCLKAB, xCLKBA xSAB, xSBA xOE xDIR
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE(1)
Inputs xOE X X H H L L L L xDIR X X X X L L H H xCLKAB X H or L X X X H or L xCLKBA X H or L X H or L X X xSAB X X X X X X L H xSBA X X X X L H X X xAx Input Unspecified Input Input Disabled Output Output Input Input
(2)
Data I/O xBx Unspecified Input Input Input Disabled Input Input Output Output
(2)
Operation or Function Store A, B unspecified Store B, A unspecified Store A and B data Isolation, hold storage Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus
(2) (2)
NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH transition 2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled; i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
BUS A
BUS B
BUS A
BUS B
OE L
DIR L
CLKAB X
CLKBA X
SAB X
SBA L
OE L
DIR H
CLKAB X
CLKBA X
SAB L
SBA X
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
OE X X H
DIR X X X
CLKAB
CLKBA X

X
SAB X X X
SBA X X X
OE L L
DIR L H
CLKAB X H or L
CLKBA H or L X
SAB X H
SBA H X
STORAGE FROM A AND/OR B
TRANSFER STORED DATA TO A AND/OR B
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH VIL IIH IIL IOZH IOZL VIK VH ICCL ICCH ICCZ ICC Parameter Input HIGH Voltage Level Input LOW Voltage Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC One input at VCC - 0.6V, other inputs at VCC or GND VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VI = VCC VI = GND VO = VCC VO = GND Test Conditions Min. 1.7 2 -- -- -- -- -- -- -- -- -- Typ.(1) -- -- -- -- -- -- -- -- -0.7 100 0.1 Max. -- -- 0.7 0.8 5 5 10 10 -1.2 -- 40 V mV A A A A V Unit V
Quiescent Power Supply Current Variation
--
--
750
A
NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient.
OUTPUT DRIVE CHARACTERISTICS
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, TA = 25C
VCC = 2.5V 0.2V Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical 39 10 VCC = 3.3V 0.3V Typical 43 12 Unit pF
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V 0.2V Symbol fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSU tH tW tSK(O) Propagation Delay xAx to xBx, xBx to xAx Propagation Delay xCLKAB to xBx or xCLKBA to xAx Propagation Delay xSBA to xAx or xSAB to xBx Output Enable Time xOE to xAx or xBx Output Enable Time xDIR to xAx or xBx Output Disable Time xOE to xAx or xBx Output Disable Time xDIR to xAx or xBx Set-up Time, xAx before xCLKAB or xBx before xCLKBA Hold Time, xAx after xCLKAB or xBx after xCLKBA Pulse Duration, CLKAB or xCLKBA, HIGH or LOW Output Skew(2) 1.6 0.6 3.3 -- -- -- -- -- 1.7 0.4 3.3 -- -- -- -- -- 1.4 0.7 3.3 -- -- -- -- 500 ns ns ns ps 1.5 6.5 -- 6 1.1 5.3 ns 1.6 5.7 -- 5 1.4 4.7 ns 1 7.8 -- 6.2 1 5.1 ns 1 6.5 -- 6.2 1 5.1 ns 1 6.8 -- 6.4 1 5.3 ns 1 5.6 -- 5.2 1 4.5 ns Parameter Min. 150 1 Max. -- 4.8 VCC = 2.7V Min. 150 -- Max. -- 4.5 VCC = 3.3V 0.3V Min. 150 1 Max. -- 3.9 Unit MHz ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction.
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
ALV C Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse Generator
(1, 2)
SAME PHASE INPU T TRAN SITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OU TPUT tPLH OPPOSITE PHASE INPU T TRAN SITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CON TROL IN PUT tPZL
DISABLE
VIN D .U .T.
VOUT
VIH VT 0V VLOAD/2 VOL + VLZ VOL VOH VOH - VHZ 0V
ALV C Link
tPLZ VLOAD/2 VT tPHZ VT 0V
RT
500 CL
ALVC Link
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
OUTPU T SW ITCH NOR MALLY CLO SED LOW tPZH OU TPUT SW ITCH NORMALLY O PE N H IGH
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V
ALVC Link
Enable and Disable Times
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
VIH INPU T VT 0V VOH OUTPUT 1 VT VOL VOH OUTPUT 2 tPLH2 tPHL2
ALVC Link
DATA INPUT TIMING INPU T ASYNC HRON OU S CON TROL SYNC HRON OU S CON TROL
tSU
tH
tREM
tSU
tH
Set-up, Hold, and Release Times
tPLH1
tPHL1
LOW -H IGH -LOW PULSE tW HIGH-LOW -HIGH PULSE
VT
tSK (x)
tSK (x)
VT
ALVC Link
VT VOL
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
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IDT74ALVC16646 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
ALVC X IDT XX Bus-Hold Temp. Range XX Family XX XXXX Device Type Package
PV PA PF 646 16 Blank 74
Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 16-Bit Bus Transceiver and Register with 3-State Outputs Double-Density, 24mA No Bus-hold -40C to +85C
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for Tech Support: logichelp@idt.com (408) 654-6459
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